May 16, 2026

Antminer S9 board - IO, MIO, and EMIO (and board connectors

I dug into all of this when trying to figure out how to get the two IO signals for i2c connected to something. The schematic is invaluable, but that is only part of the story.

The S9 has nine 18 pin connectors. These are called "hashboard" connectors on the schematic. Each of these has one MIO signal and six signals from the PL (FPGA fabric). So we have 9 MIO signals along with 54 PL signals. The MIO signals are MIO 28 through MIO 36. On each connector, pin 18 has the MIO signal.

My Antminer boards have pins soldered to J2, J3, and J4. For some reason J1 was skipped. Probably because it was near the edge of the board.

To get i2c signals onto these pins, we need to configure the MIO pin registers in the SLCR (system level control register) section. The relevant pages of the TRM for this are pages 1660 through 1662. It turns out that only i2c-1 is available on J2 (MIO 29), but MIO 30 and 31 give me the signals I want for i2c-0 as follows: 

J3 pin 18 -- MIO 30 - i2c-0 clock
J4 pin 18 -- MIO 31 - i2c-0 data
Note: there are MIO pin registers for MIO-0 through MIO-53 (54 signals).

The 18 pin connectors also offer several grounds as well as 3.3 volts. 

MIO-0 through MIO-14 are devoted to NAND memory.
MIO-15 drives an LED.
MIO-16 through MIO-27 are devoted to ethernet.
MIO-28 through MIO-36 are available (see the above)
MIO-37 and 38 are the red/green LED near the ethernet
MIO-39 drives a non-existant beep
MIO-40 through MIO-45 are devoted to the CD
MIO-46 is CD SW
MIO-47 is key/reset (switch S1)
MIO-48 is uart Txd
MIO-49 is uart Rxd
MIO-50 is CD WP
MIO-51 IS IP Get (switch S2)
MIO-52 is ethernet MDC
MIO-53 is ethernet MDIO
MIO-39 is clearly available for any use we might think of. There are two other signals here that could be made available. The S1 signal as configured makes the button drive MIO-47, I plan to reconfigure it to drive the actual reset, making this signal available. The S2 signal makes a handy button, but if that is not useful, this signal (MIO-51) could be hijacked for other purposes.

The S9 also has six 4-pin fan connectors. Each of these has 2 signals, but these are from the PL not MIO.

So there are 54 + 12 = 66 PL logic signals available on these connectors.

Feedback? Questions? Drop me a line!

Tom's Computer Info / tom@mmto.org