December 5, 2020

USB - A peek at the STM32F411 hardware

This is chapter 22 in RM0383.

It has a dedicated 1.25 Kbyte RAM with fifo control. So 5 pieces of 256 bytes each.
It supports a bidirectional control endpoint 0 (naturally).
It supports 3 IN and 3 OUT endpoints
It uses a shared Rx/Tx FIFO
It allows 4 dedicated TX-IN FIFOs
It supports soft disconnect.

Registers

It has a gang of registers, in groups as follows: 
Core registers
Host mode registers
Device mode registers
Power and clock registers.
EP 0 FIFO (4K)
EP 1 FIFO (4K)
EP 2 FIFO (4K)
EP 3 FIFO (4K)

Direct access to FIFO ram for debugging. (128K)
The 4K and 128K numbers are puzzling given that we are told there is 1.25K of FIFO ram, but these are probably just address windows into a possibly bigger FIFO ram available on other STM32 chips.

Interrupts

The F411 uses two interrupts. The F405/F407 supports high speed and uses 4 additional interrupts. The F405/F407 also has ethernet, but we are getting ahead of ourselves. 
void usb_wakeup ( void ) {}
void usb_fs ( void ) {}

#define IRQ_USB_WAKEUP  42
#define IRQ_USB_FS      67
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Tom's Computer Info / tom@mmto.org