January 15, 2026

Kyu - network and MDIO - a look at the U-boot phy.c driver

It is a mystery to me why all of this MDIO/PHY stuff is so complex. Frankly it is overly complex and overengineered. The way the scheme is set up there can be multiple MDIO "buses" and multiple devices on a bus.
When does that happen? Ever?

The only arrangement I have ever seen anywhere is a single PHY device at the other side of a MII link. What kind of setup would ever have multiple PHY devices? I guess I can envision some setup where the ability to connect to several different "cables" (physical media) was provided -- but I have yet to see such a thing, and I think I will be waiting a long time before I do.
Nevertheless, we are stuck with the existing overengineered setup, so we may as well roll up our sleeves and understand it.

A good place to start is the file: drivers/net/phy/phy.c. It is 1364 lines of code. Compare that to 929 lines of code for sun8i_emac.c
Doesn't it seem peculiar the the PHY code is almost 1.5 times as big as the ethernet driver it self? Don't get me started.

There is an alphabet soup of acronyms involved with the Phy driver.

The first interesting thing to note about phy.c for U-Boot is that it contains a driver for a "genphy" device. For some (many) Phy chips this will get the job done. It does the job for the Realtek RTL8211E used along with the H5 chip on my Orange Pi PC 2 board.

It might have been clearer to put it in its own file genphy.c alongside other Phy devices in drivers/net/phy, but that is not what they did. There is a file "realtek.c", but it is not used for the RTL8211E on my board. Keep in mind this entry in the dts (device table) file for the Orange Pi PC 2 --

&external_mdio {
    ext_rgmii_phy: ethernet-phy@1 {
        compatible = "ethernet-phy-ieee802.3-c22";
        reg = <1>;
    };
};
(From arch/arm/dts/sun50i-h5-orangepi-pc2.dts)

IEEE 802.3 is ethernet. C22 is "clause 22" which defines the original Management Data Input/Output (MDIO) interface for Ethernet (which had 2 wires, MDC clock and MDIO data). It was the interface between the MAC (media access controller) in the ethernet device and the PHY device. Certain registers are specified. This is extended (and more registers specified) in C45 (Clause 45).

U-Boot internals

The U-Boot authors have provided some internal documentation:


Have any comments? Questions? Drop me a line!

Tom's electronics pages / tom@mmto.org