Sun 3/80 -- address map

We don't have any real hardware documentation for the Sun 3/80.
We are putting this together in pieces as we search for clues.

A current guess is that the ROM is at 0xfefe0000 -- 0xfeffffff

The floppy and parallel port are unique to the 3/80 and are as follows:

controller  fdc0 at obio ? csr 0x6e000000 priority 6 vector fdintr 0x5c
device      pp0 at obio ? csr 0x6f000000 priority 1

device      le0 at obio ? csr 0x65002000 priority 3 (lance ethernet)
controller  sm0 at obio ? csr 0x66000000 priority 2 (scsi)
device      zs0 at obio ? csr 0x62002000 flags 3 priority 3 (zilog serial)
device      zs1 at obio ? csr 0x62000000 flags 0x103 priority 3
device      cgfour0 at obmem ? csr 0x50300000 priority 4 (cgfour 8-bit framebuffer)
device      cgsix0 at obmem ? csr 0x50000000 priority 4 (accelerated 8-bit framebuffer)
device      cgeight0 at obmem ? csr 0x50300000 priority 4 (24 bit frame buffer)
device      bwtwo0 at obmem ? csr 0x50300000 priority 4 (monochrome frame buffer)

/*
 * The obio or type "1" address space.
 */
#define OBIO_MIN_ADDRESS    0x58000000
#define OBIO_MAX_ADDRESS    0x7BFFFFFF

/*
 * Physical addresses of nonconfigurable devices.
 */
#define OBIO_FPA_ADDR       0x5C000000

#define OBIO_IOMMU          0x60000000

/* Note that these six are all in the same page. */
#define OBIO_ENABLEREG      0x61000000
#define OBIO_BUSERRREG      0x61000400
#define OBIO_DIAGREG        0x61000800
#define OBIO_IDPROM1        0x61000C00 /* 3/470 only */
#define OBIO_MEMREG         0x61001000
#define OBIO_INTERREG       0x61001400

#define OBIO_ZS_KBD_MS      0x62000000
#define OBIO_ZS_TTY_AB      0x62002000

/*
 * Note: there are two kinds of EEPROM/IDPROM/clock!
 * On the 3/80 one Mostek MK48T02 does it all.
 * The 3/470 uses the older, discrete parts.
 */
#define OBIO_EEPROM         0x64000000
#define OBIO_IDPROM2        0x640007D8 /* 3/80 only (Mostek MK48T02) */
#define OBIO_CLOCK2         0x640007F8 /* 3/80 only (Mostek MK48T02) */

#define OBIO_CLOCK1         0x64002000 /* 3/470 only */

#define OBIO_INTEL_ETHER    0x65000000
#define OBIO_LANCE_ETHER    0x65002000

#define OBIO_EMULEX_SCSI    0x66000000 /* 3/80 only */
#define OBIO_EMULEX_DMA     0x66001000 /* 3/80 only */

#define OBIO_PCACHE_TAGS    0x68000000
#define OBIO_ECCPARREG      0x6A1E0000
#define OBIO_IOC_TAGS       0x6C000000
#define OBIO_IOC_FLUSH      0x6D000000

#define OBIO_FDC            0x6e000000  /* 3/80 only */
#define OBIO_PRINTER_PORT   0x6f00003c  /* 3/80 only */

#define ENA_DBGCACHE    0x0008      /* r/w - debug mode for system cache */
#define ENA_LOOPBACK    0x0010      /* r/w - vme loopback mode */
#define ENA_IOCACHE 0x0020      /* r/w - enable I/O cache */
#define ENA_CACHE   0x0040      /* r/w - enable system cache */
#define ENA_DIAG    0x0100      /* r/w - diag switch/programmable */
#define ENA_FPA     0x0200      /* r/w - enable floating point accel */
#define ENA_RES     0x0400      /* r/o - monitor resolution */
#define ENA_VIDEO   0x0800      /* r/w - enable video memory */
#define ENA_SDVMA   0x2000      /* r/w - enable system DVMA */
#define ENA_FPP     0x4000      /* r/w - enable floating point proc */
#define ENA_NOTBOOT 0x8000      /* r/w - non-boot state, 1 = normal */