July 3, 2017
The Cortex-M3 runs only in thumb mode!
The idea is this. There are two such regions.
One maps 1M of SRAM (which starts at 0x20000000).
The other maps 1M of Peripherals (which start at 0x40000000).
The SRAM region is mapped to a 32M region starting at 0x22000000.
The Peripheral region is mapped to a 32M region starting at 0x42000000.
If you write a 0 or 1 to a 32 bit word in the band region, the corresponding bit in the "real world" region gets cleared or set, and this is done using an atomic read-modify-write.
So, if you want to clear the first bit of the word at address 0x20000000, you write a zero to 0x22000000. To clear the next bit, you write to the word at 0x22000004. You increment by 4 since you are dealing with 32 bit words in the bitband region.
Take a look at Chapter 4 of the Cortex-M3 reference manual. Here is a list, perhaps not complete:
The NVIC is absolutely crucial if you want to use interrupts.
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