March 20, 2025
There is also a HS controller -- at a different base address and using IRQ 77 rather than IRQ 67. So far I have not had any luck getting it to work. The code I have definitely supports it.
The code has a number of compile options related to the HS controller. Before I dive into those, I should note that it is not possible to use the HS controller in HS mode without an external HS Phy chip. The F407 and F429 have an internal FS Phy for this second interface. None of my boards have an outboard HS Phy. This means I won't be able to use the second usb controller in HS mode. I can use it in FS mode using the internal Phy, and that is just what I am trying to do.
I should mention as a quick side note that this second HS controller is "better" even in FS mode. It supports more endpoints and has more FIFO ram, and probably other advantages I don't know about yet.
Many of the compile options show up in driver/usb_core.c and are referenced in USB_OTG_SelectCore (). Such as:
#ifdef USB_OTG_ULPI_PHY_ENABLED #ifdef USB_OTG_EMBEDDED_PHY_ENABLEDWe would expect one or the other of these to be defined.
//#define USB_OTG_INTERNAL_VBUS_ENABLED #define USB_OTG_EXTERNAL_VBUS_ENABLED #ifdef USE_ULPI_PHY #define USB_OTG_ULPI_PHY_ENABLED #endif #ifdef USE_EMBEDDED_PHY #define USB_OTG_EMBEDDED_PHY_ENABLED #endif #define USB_OTG_HS_INTERNAL_DMA_ENABLED #define USB_OTG_HS_DEDICATED_EP1_ENABLEDWhat I do see is a top level file usb_conf.h where such things are defined. And it needs some work -- things from template.h need to be copied in.
Notice that now USB_OTG_HS_DEDICATED_EP1_ENABLED is defined. This means that I need to uncomment some code I thought I would never care about This will also require setting up some other interrupt vectors.
Also, there is some compile problem in vcp/usbd_cdc_core.c when I define USB_OTG_HS_INTERNAL_DMA_ENABLED. It looks for usbd_cdc_Desc, which is some missing enumeration descriptor -- so I switch this off. I can investigate this later once I get things working.
All of this is important, but as it turns out is not the issue that was causing things not to work.
USBint - OUT Endpoint OTG ISR status: 00080008I add the code for the special endpoint 1 interrupt handlers and now I get never ending messages:
USB HS ep1 out interruptThis is nice progress. Actually when I get endless messages from an interrupt I need to figure out how to cancel, I am usually right on the edge of a breakthrough. Now I actually connect the calls in usb.c to the routines in driver/usb_dcd_int.c and it all works!
I can send test packets now (which of course go to endpoint 1.
Wow!
I just plugged in a plain ordinary micro-USB cable. Then I rebuilt Hydra for the disco, flashed the new code (using "make flash") and it enumerated! My test sending data worked also, but I needed to make a small change to my C program so it would write to /dev/ttyACM1 rather than 0 (the STlink port on the disco had already claimed ttyACM0.
This is a nice thing to have checked off my list, and it is nice to know that just a plain old micro-USB cable works for this OTG port. It could also act as a host, but that would be a project for another day, and not very soon.
On the other hand, compare our nearly 1000 Kbits per second to 115.2 Kbits using our serial port at 115200 baud.
But it works, and we had no trouble or errors sending 10M bytes of data.
I could go back now and investigate this "DMA ENABLED" flag -- but I won't do that right away.
Tom's Computer Info / tom@mmto.org