February 27, 2025

Black Pill boards - run Hydra as I left it back in 2021

I did my original work on the F411 as some simple bare metal demos. Then I moved my work to "Hydra", which I intended to be a common framework for both F103 and F411 devices. The question now is whether to continue with Hydra or to work up some more bare metal demos.

To answer this, part of the question will be to remember just how much work I did with Hydra and where I left my USB shenanigans in that context. I thought that I could answer the question by seeing if Hydra had a nice print and my bare metal did not, but I have printf ready to go either way.

what is the state of things with Hydra?

Let's run it and see what we learn:
cd Hydra
make clean
make
make flash
After this, we see the following on the console. I did this with no USB cable attached.
Up and running mainline code
USB test running
- VCP DataTx 9 bytes: 1 h
1 hello
- VCP DataTx 9 bytes: 2 h
2 hello
... ... ...
- VCP DataTx 9 bytes: 8 h
8 hello
USB test done
Enter idle loop
Plugging in a cable (without rebooting) yields a LOT of activity. Here is a part of it:
USBint = OUT Endpoint 0 xfer complete
USBint - Rx level
Endpoint 0, read packet 8 bytes from FIFO
USBint - Rx level
USBint = OUT Endpoint 0 setup done
- EP 1 StartXfer 64 bytes
- EP 0 StartXfer 0 bytes
USBint = IN Endpoint 1 empty Tx
Endpoint 1, write packet 64 bytes to FIFO: 1 h
USBint = IN Endpoint 0 Xfer complete
USBint - Rx level
This all must be interrupt driven, as the processor is executing an idle loop.

This raises more questions than it answers. For example what is "VCP"?


Feedback? Questions? Drop me a line!

Tom's Computer Info / tom@mmto.org