The USB device (USB OTG FS) is located at address 0x5000_0000 in the address map. It is on the AHB2 bus. The chip as both AHB and APB buses, and AHB is the high performance bus. The USB device needs to be enabled by configuring RCC registers. Also the 48 Mhz clock for the USB device needs to be configured via RCC registers.
The two data pins used by USB need to be configured for USB rather than GPIO via the GPIO config registers.
page 694 (22.16.1) gives a CSR memory map for the USB subsystem.
The address space at 0x5000_0000 is partitioned as follows (see page 694)
0000 - core registers (1K) 0400 - host registers (1K) 0800 - device registers (1.5K) 0e00 - power and clock registers (0.5K) 1000 - endpoint 0 (4K) 2000 - endpoint 1 (4K) 3000 - endpoint 2 (4K) 4000 - endpoint 3 (4K) .. and more endpoints, but we don't have more 2_0000 - direct access to FIFO ram (128K)Notice that this address space is 256K all told (0x5000_0000 to 0x5003_ffff) but is sparsely populated. We have 4K regions for a multitude of endpoints, but only 4 actually exist. We have a 128K region for FIFO ram, but we only have 1.25K of FIFO ram. No harm is done by this. The designers at Synopsys made these decisions, giving themselves plenty of elbow room in each address region.
I'll also note in passing that the stm32duino code only deals with the F411 in device mode and has nothing to do with the host registers.
DCD is "device control driver", i.e. what we are talking about the whole time here. HCD is "host control driver", which we try to ignore.
Tom's Computer Info / tom@mmto.org