The board with this chip on it is the "Pico 2".
Dual Cortex-M33 rather than dual Cortex-M0+ optional RISC-V cores (Hazard3 RISC-V) 150 Mhz rather than 133 Mhz 520K of SRAM rather than 264K 16M rather than 2M of external flash more GPIO (30-48 GPIO pins) more PIO (12 rather than 8) via programmable state machines Security (TrustZone) with 8K of OTP.I find the RISC-V as an "alternative" to be truly bizarre. Silicon real estate must be allocated for 4 cores, but we can only use 2 at a time! Two cores just sit there idle!? This seems like a ridiculous waste.
I am perfectly happy with ARM and view the whole RISC-V enthusiasm with a cynical eye. I have written at length about this elsewhere. It is "open source", but how does that help me? I am not fabbing silicon, nor am I putting RISC-V cores into FPGA so who cares? It is a "feel good" thing that has never yielded any merit for me.
Now if money was saved by not paying royalties to ARM and those savings were passed on to me, I might see an advantage, but with both ARM and RISC-V cores on this chip, that surely is not happening.
Tom's electronics pages / tom@mmto.org