December 29, 2021
Orange Pi 4 (Rockchip 3399) Address map
The board ships with 4G of ram.
This is exactly the amount that a 32 bit address can address.
RAM starts at address 0 and continues to 0xf7ff_ffff.
This leaves the last 128M of ram inacessible,
hidden behind device registers.
Device registers
See the TRM part 1, page 13 for a diagram.
The diagram is a pain in the ass, designed by martians.
0000_0000 to f7ff_ffff DDR (4G - 128M)
f800_0000 to fdff_ffff PCIe (96M)
fe30_0000 ... device registers start
...
fffd_0000 to fffd_ffff bootrom (64k)
fffe_0000 to fffe_ffff -- reserved (64k)
ffff_0000 to ffff_ffff bootrom (64k) or intmem0, see below
The diagram shows INTMEM0 at ff8c_0000, 192k in size.
Note that there is also INTMEM1 at ff3b_0000, 64k in size.
Bootrom
The readout I have of the bootrom shows only 32K of content.
On page 14 of the TRM is a flow chart that says that the
Cortex-A53 gets its first instruction from 0xffff_0000
and that is where things start up.
A bit in SGRF_PMU_CON0 (bit [15]) is "remap".
- when remap is set 0, the ffff_0000 address accesses bootrom
- when remap is set 1, the ffff_0000 address accesses "INTMEM0"
There is not much to say about this. The publicly available manuals don't
discuss SGRF_PMU_CON0. It is safe to say this must be zero on reset,
or else the bootrom would not be at address ffff_0000 as expected.
Have any comments? Questions?
Drop me a line!
Tom's electronics pages / tom@mmto.org