December 24, 2016

PSCI

This is an important ARM concept. PSCI is "power state configuration interface". But this business goes deeper (and is independent of PRCM, which is power control as done by the SoC external to ARM).

The ARM can run is supervisor (aka "secure") or hypervisor (aka "insecure") mode. The Hypervisor mode is more priveleged than supervisor mode (hence it is called insecure). It would seem that you need to be in hypervisor mode to do things like start additional cores.

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Tom's electronics pages / tom@mmto.org