ARM Processor 101 -- the MMU table

The MMU maps 4G of address space. Each descritor maps a 1M "section". Therefore we need 4*1024 descriptors which will take up 16K of ram.

Now consider the address map on the Orange Pi. We have 1G of ram (typically) starting at 0x4000_0000. This means the 2G from 0x800_0000 to the end could be invalidated. We have IO devices scattered in the 1G starting at 0x0.

Now consider the BBB. We have 1/2G of ram starting at 0x8000_0000. Nothing is at address 0, so we can map that as invalid to catch wild pointer bugs. IO addresses are at addresses with 0x4000_0000 and up.