FPGA - CPU designs as examples

• Github: Multicomp: 68000
• Github: MultiComp
• Github: Design a CPU
• Github: Doug Gilliland - as per all the above.
• Multicomp web page
• Retro 68000 in an FPGA
• RTL m68k
• 1983 article on m68k design by Motorola engineer

• PDP-11 on an FPGA
• Data General Nova in Verilog
• Open Cores - processor projects
• NextZ80

• Github: 32 bit RISC-V in Verilog
• Github: DarkRISC - RISC-V coded in one night (verilog)
• Risc-V VHDL
• Github: Risc-V VHDL
• Hackaday:RISC-V in VHDL

• 16 bit MIPS in Verilog
• Verilog projects
• VHDL projects
• VHDL versus Verilog
• FPGA projects