0x2E0 is a write only "ID" port 0x2E2 is a read/write "Data" portThe game is to write a "selector" into the ID port, then a subsequent read or write from the data port interacts with the selected "register" inside the EMUP.
A wonderful resource is this document for the ALL-03 (which is just an EMUP with different branding). What follows are my own notes from studying this document.
All devices get set to zero by reset.Caution Before applying any DAC controlled voltage to a pin, the TTL control for that pin must be set high. Otherwise the pin will be connected to ground and damage to the DAC supply voltage will occur.
A Voltage drop of 0.6 volts exists between the DAC sources and the test socket. These must be considered when making the DAC settings:
VCC -- 0.6 volts = 15 steps VHH -- 0.6 volts = 10 steps VOP -- 0.6 volts = 6 steps
I see these offsets handled in the "write to DAC" routines in the code.
0xe5 - VOPID DAC (10.2 to 25.5 volt) 400 mA 0xe6 - VHHID DAC (5.1 to 15.3 volt) 400 mA 0xe7 - VCCID DAC (0.0 to 10.2 volt) 1000 mAThe VCC dac is 15.3 volts full range, with a resolution of 0.04 volts.
0x7d = 125 --- 125*.04 = 5.0 volts (how about that?) 0x89 = 137 --- 137*.04 = 5.48 volts (why would this be used?
The VOP dac is 25.5 volts full range, with a resolution of 0.1 volts.
So the output voltage = val * 0.1
I see the value 0x32 in the code.
0x32 = 50 --- 50*0.1 = 5.0 voltsI see this in the epp512.exe program which handles common EPROM chips like the 2764 -- these have a 5 volt programming pulse, so this makes sense.
The VHH dac is 15.3 volts full range, with a resolution of 0.06 volts.
So the output voltage = val * 0.06
This dac is never used in epp512.exe and must exist for other devices.
Our document says for a value of 85 --- 85*0.06 = 5.1 volts.
Note the comment about minimum values for the VCC and VHH dacs. The scaling starts at zero, so who knows what causes these limits. They are no doubt an aspect of whatever circuitry is used.
0xe0 - TTLID-0 0xe1 - TTLID-1 0xe2 - TTLID-2 0xe3 - TTLID-3 0xe4 - TTLID-4 0xe5 - VOPID DAC (10.2 to 25.5 volt) 400 mA 0xe6 - VHHID DAC (5.1 to 15.3 volt) 400 mA 0xe7 - VCCID DAC (0.0 to 10.2 volt) 1000 mA 0xe8 - VOP_EN_ID-0 0xe9 - VOP_EN_ID-1 0xea - VOP_EN_ID-2 0xeb - VOP_EN_ID-3 0xec - VOP_EN_ID-4 0xed - VCC_EN_ID-0 0xee - VCC_EN_ID-1 0xef - OTHER_EN_ID 0xf0 - VHH_EN_ID-0 0xf1 - VHH_EN_ID-1 0xf2 - VHH_EN_ID-2 0xf3 - VHH_EN_ID-3 0xf4 - VHH_EN_ID-4 0xf5 - VHH_ENC_ID-0 0xf6 - VHH_ENC_ID-1 (not currently used) 0xf7 - "mystery" port that is definitely access (not in original documentation) 0xf8 - "secret" port (see below, not in original documentation)The device socket has 40 pins, so 5 registers of 8 bits allow us to specify any pin. In general, each pin can have one of four configurations:
0xf5 bit 3 -- pin 32 0xf5 bit 4 -- pin 31 0xf5 bit 5 -- pin 30 0xf5 bit 6 -- pin 29 0xf5 bit 7 -- pin 28Port 0xf6 is not currently used.
0xed bit 0 -- pin 40 0xed bit 1 -- pin 36 0xed bit 2 -- pin 34 0xed bit 3 -- pin 32 0xed bit 4 -- pin 31 0xed bit 5 -- pin 30 0xed bit 6 -- pin 29 0xed bit 7 -- pin 28 0xee bit 0 -- pin 27 0xee bit 1 -- pin 26 0xee bit 2 -- pin 9 0xee bit 3 -- pin 7 0xee bit 4 -- pin 5 0xee bit 5 -- pin 1 0xee bit 6 -- not used 0xee bit 7 -- not used
0xef bit 0 -- low set pin 20 to ground, high sets pins 11 and 30 to ground 0xef bit 1 -- output VOP (source-2.4) to pin 7 0xef bit 2 -- output VOP (source-2.4) to pin 25 0xef bit 3 -- TTL oscillator to pins 2 and 3 (one inverse of the other 0xef bit 4 -- TTL oscillator to pins 18 and 19 (one inverse of the other 0xef bit 5 -- high selects 4.432 Mhz, low selects 2.216 Mhz oscillator 0xef bit 6 - not used 0xef bit 7 - not used
We have 3 groups of 8 addresses.
e0 - e7 = read and write e8 - ef = write only f0 - f7 = write onlyAnd, all on its own:
f8 -- secret read portNote that e0 - e4 are the TTL read/write where read/write makes sense.
I do see the code reading from port e7 (the VCC dac address).
Identification (every program, at start and before each operation):
a function check(n, expect) writes E7 = 00, 01, 00, 02, then n pulses (03, 02), then 00;
selects register F8 (not in all03info.txt) and compares its low nibble with "expect".
...
So the box has some clocked logic readable at F8; a plain binary counter, a 4040's bit pairs,
small LFSRs and running totals don't fit, so it needs the real box (or its schematic) to settle.
BPPGM.EXE's check is at file offset 6C82; patching the jne at 6D44 to two NOPs
(scratch copy only) skips it.
This is something I can investigate -- I have the EMUP disassembled and boards laying in a box,
and I am busy disassembling some of the software I have.
Another possibility is that this game somhow unlocks the programmer itself. Once again, we will have to experiment to find out. I have scanned the PCB for any kind of chip that would be a counter, and there is nothing of the sort. So unless a counter was implemented in one of the GAL devices (which is possible, but unlikely), I am baffled.
Tom's Electronics pages / tom@mmto.org