The 8 bits in the register look like this:
C B i2 i3 -- i4 p25 p7 ABits CBA control an LS138 decoder which controls a group of transistors that pull various pins to ground.
000 - pin 20 GND 001 - pin 11 GND 010 - pin 1 GND 011 - pin 22 GND 100 - pin 28 GND 101 - pin 40 GND 110 - pin 30 GND 111 - pin 29 GNDNote that this differs from another document that states that BC are "don't care" and that A alone controls things as follows:
A == 0 set pin 20 to ground A == 1 set pin 11, 30 to groundMy inclination is to believe the schematic, but to verify it by experiment someday.
The p7 and p25 bits will send Vop (2.4 volts) to pin 7 or 25 respectively if set high.
The bits i2,i3,i4 control the clock signals.
Clocks may be sent to pin 2, 3, 18, or 19.
Here is our register again for handy reference:
C B i2 i3 -- i4 p25 p7 AHere is what we see inside the PAL:
pin2 = feed_out*/i2*/i3*i4
+ clk2*i2*/i3*i4
+ /i2*/i3*/i4
pin3 = /pin2 + /i2*/i3*/i4
pin18 = feed_out*/i2*i3*/i4
+ clk2*i2*i3*/i4
+ /i2*/i3*/i4
pin19 = /pin18 + /i2*/i3*/i4
Here "feed_out" is always pulled to Vcc.
Also clk2 is always 4.194304 Mhz.
My take on this differs from the document once again (but should be checked by experiment).
If we set i2,i3,i4 to 101 we get a clock on pin2 and the inverse on pin3.
If we set i2,i3,i4 to 110 we get a clock on pin18 and the inverse on pin19.
The clock is always 4.194304
No doubt there is some device out there that requires a pair of clocks that are the inverse of each other, but I have no idea what it might be.
Take note though of the other terms in these equations.
If we set 000 we will get pins 2,3,18,19 driven high if I am not mistaken.
If we set 111 we will get these pins driven low.
However the driving low is done by an open collector device.
A 7407 is used for pins 2 and 3 (which does not invert).
So the pins are not actually driven high, but they float and
can be controlled by other logic.
Supposedly a 7406 is used for pins 18 and 19 (which does invert),
but I don't believe it and I think the schematic is in error.
For one thing, if this was true there would be no way to let all 4 of
these pins just "float" and be driven by other logic.
For a second thing, I have looked at my boards and don't see any
7406 devices anywhere.
More cases where experimentation would be valuable.
I took a hunch and searched for the pinout of the Intel 8748 microcontroller, to find that pins 2 & 3 are XTAL1 and XTAL2, respectively. Although I didn’t go as far as checking out how this MCU is programmed, this does line up with your sentence “If we set i2,i3,i4 to 101 we get a clock on pin2 and the inverse on pin3”. So I would suspect that these programmer clock configurations are for the purpose of programming various microcontrollers from Intel, Motorola, Zilog and TI. Some may even require one of the crystal pins to be biased to half-rail, which might correlate with your sentence “The p7 and p25 bits will send Vop (2.4 volts) to pin 7 or 25 respectively if set high” (though one would usually expect clock pins to be adjacent to each other).So we know that this clock business (part of it anyway) is to support the intel 8748.
So we are left with the 3 bits (oddly separated in the register) that control the ground. This definitely is important. I don't see that the two way switch in the document I have would "get the job done", so I believe that having the 8 choices given by those 3 bits makes sense, but it all should be checked by experiment.
Tom's Electronics pages / tom@mmto.org