January 11, 2021

EBAZ4205 Bitcoin miner board - MIO connections

The Zynq has MIO and EMIO. We have 54 MIO signals routed to chip pins (i.e. the "outside world") EMIO is routed to the PL (the FPGA) -- dealing with it is a topic for another page.

GPIO and MIO

Talking about GPIO will be an example of how many other things will work. The Zynq has a GPIO subsystem with 4 banks, each bank has 32 bits. Bank 0 and 1 are routed to MIO with all 32 bits in bank 0 used and 22 bits of Bank 1 used.

Banks 2 and 3 deal with EMIO. I don't intend to talk much about this here. You get 64 input bits, 64 output bits, and 64 output enables. EMIO can be simply routed through the PL to IO pins, or it can be routed to IP blocks in the PL.

The MIO is a multiplexer that decides what is actually talking to each physical device pin. Many of these pins will not be GPIO, but will be dedicated to other on chip interfaces (such as flash memory, SD card, Uart, or who knows). Each board will be different.

MIO on the EBAZ4205

The following list was developed by merging (by hand) information on the schematic and the pin list and then scrutinizing the schematic.

Note: U31 is the XC7Z010
CE*, RE*, RY/BY*, ALE, CLE etc. all go to the flash (U12)
U12 is the flash, so U12 is the 8 bit path to flash 

MIO00 E6   CE*        Flash
MIO01 A7   n/c
MIO02 B8   ALE        Flash
MIO03 D6   WE*        Flash
MIO04 B7   U12-IO2    Flash
MIO05 A6   U12-IO0    Flash
MIO06 A5   U12-IO1    Flash
MIO07 D8   CLE        Flash
MIO08 D5   RE*        Flash
MIO09 B5   U12-IO4    Flash
MIO10 E9   U12-IO5    Flash
MIO11 C6   U12-IO6    Flash
MIO12 D9   U12-IO7    Flash
MIO13 E8   U12-IO3    Flash
MIO14 C5   RY/BY*     Flash
MIO15 C8   n/c
MIO16 A19  U31-N16 (via n/c resistor R2608)
MIO17 E14  n/c
MIO18 B18  U31-L14 (via n/c R2609)
MIO19 D10  n/c
MIO20 A17  U3.A17  to button S2
MIO21 F14  n/c
MIO22 B17  n/c
MIO23 D11  n/c
MIO24 A16  U3.A16	??
MIO25 F15  U3.F15	??
MIO26 A15  U31-A15	??
MIO27 D13  U31-D13	??
MIO28 C16  n/c
MIO29 C13  n/c
MIO30 C15  n/c
MIO31 E16  n/c
MIO32 A14  U3.A14   to button S3
MIO33 D15  n/c
MIO34 A12  U3.A12   SD card
MIO35 F12  20K resistor to Vcc
MIO36 A11  n/c
MIO37 A10  n/c
MIO38 E13  n/c
MIO39 C18  n/c
MIO40 D14  U3.D14    SD card
MIO41 C17  U3.C17    SD card
MIO42 E12  U3.E12    SD card
MIO43 A9   U3.A9     SD card
MIO44 F13  U3.F13    SD card
MIO45 B15  U3.B15    SD card
MIO46 D16  n/c
MIO47 B14  n/c
MIO48 B12  n/c
MIO49 C12  loops to B13 via n/c R2445
MIO50 B13  loops to C12 via n/c R2445
MIO51 B9   n/c
MIO52 C10  n/c
MIO53 C11  n/c
Note that there are 4 mystery pins in the above. There are a lot of n/c (no-connect pins).

The bottom line is that almost none of this is available for general use. This is too bad, because the MIO pins can be used by the PS (the ARM) without having to do anything with the PL (the FPGA).

Any real IO to the outside world will need to be done through the EMIO talking to the FPGA and thus to the 42 pins that are routed to the three "DATA" connectors on the EBAZ4205.

Feedback? Questions? Drop me a line!

Tom's Computer Info / tom@mmto.org