May 17, 2022

EBAZ4205 - At it again in 2022

I last worked on this back in January of 2022. Now after a year doing other things, and getting some experience with a Zedboard, Zybo, and Vivado, I am back at it again.

I have my board set up to run from a 12 volt wall wart (1.5 amp) and that seems to work just fine. I use a USB to serial adapter on the console uart, and at 115200 baud I see things.

Without a network cable attached, it goes into an unhappy loop. Once I plug in a cable, it does a TFTP boot from the network and runs "bitcoin.bin". This is the end result of a lot of work I did back in 2021, but exclusively on the ARM (PS) side of the Zynq chip.

The unit derives 4 power supply voltages and I measure:

LED4 (near the network connector) is simply connected to Vcc (3.3 volts) and should thus be on all of the time.

LED1 (near the Zynq chip) is in fact on all of the time (but blinks when it is in the unhappy loop without a network cable connected). This is driven by pin R11 (DON_0) on the Zynq.

The red and green LED next to the network connector are driven by W14 (red) and W13 (green) which are from the FPGA in the Zynq.

My board has one button (S2) and a place for a second (S3). S2 drives pin A17 and S3 drives pin A14. Both of these are MIO (multiplexed IO) on the Zynq. I did write code back in 2021 that read the MIO (as GPIO) and detected button pushes.

When the unit boots, U-boot announces: 

Model: Zynq Zed Development Board
This means more to me now that I have a Zedboard that I have started to work with.

I get busy and solder a JTAG header on the 14 pads provided for such. The solder really does not want to wick onto the pads even though I use flux, but hopefully I do a good enough job.

A sticker near the JTAG pads gives the MAC address, and is getting nearly unreadable: 8CC7D01721F7.

Some odd things

Somehow, just having a 3 wire connection (with Rx, Tx, and Ground) can oower the board and cause LED on the board to be lit up. I find this quite surprising, but observe it all the time.

LED1 next to the Zynq is driven by the DONE_0 signal. This should indicate when the PL is configured. I see this on virtually all of the time. Does U-Boot somehow load or initialize the PL? This deserves close attention.

My last bare metal project was "timer" and that is what boots all the time on my current system.

Feedback? Questions? Drop me a line!

Tom's Computer Info / tom@mmto.org