Open Logic Sniffer (OLS) - general overview
7-2-2013
The board contains 4 chips:
- A PIC18F24J50, which connects to the USB port.
- A Xilinx "spartan" XC3S250E chip.
- An 8 pin Winbond 25X40BVNIG (an eeprom?).
- A PG4SK LCX16245 which connects to the probes.
The end of the board is a 18 pin header (16 signals and 2 grounds)
that the probes connect to.
There is a reset and and "update" button.
There are power and "act" LED's.
There are "trigger" and "armed" LED's
Features
The "Logic Sniffer" samples at 200 Msps, which means that it can monitor signals
changing as fast as say 70 Mhz or so. It ships with 16 5 volt tolerant channels,
and also has a "wing" port that can be used to add 16 more channels (which I do
not intend to do). The memory in the Xilinx chip can be configured to capture:
- 32 channels with 4k sample depth.
- 16 channels with 8k sample depth.
- 8 channels with 16k sample depth.
Sources of information
Feedback? Questions?
Drop me a line!
Tom's Computer Info / tom@mmto.org