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PromICE/Serial

 
 
How the PromICE/Serial Works
PromICE/Serial Components
Powerful Development Features
Serial ROMs Supported
PromICE/Serial Benefits
PromICE Reusability
unoROM

The first memory emulator for serial ROMs used with FPGAs. PromICE used with unoROM (shown here), allows hardware designers to stop burning ROMs and for the first time easily test design alternatives to optimize FPGA design. Only PromICE from Grammar Engine can emulate serial configuration ROMs. PromICE/Serial closes the gap between theoretical FPGA layouts and real world performance.

How PromICE/Serial works

PromICE/Serial connects to hardware under development through a serial ROM socket. The FPGA configuration file (binary or hex) produced by any design software is loaded to PromICE/ Serial (using Grammar Engine's software) through a host’s serial, parallel or Ethernet port. Once the configuration file is loaded, no interaction is required between PromICE/Serial and the host. Each time the hardware is reset, PromICE/Serial loads the configuration file into the FPGA, emulating all timing and loading characteristics of the serial ROM.

PromICE/Serial Components

PromICE/Serial consists of a standard PromICE memory emulator and a serial ROM adapter called the unoROM. The unoROM can be purchased separately if the customer has a PromICE. Cables to connect unoROM to PromICE and two 8 pin DIP cables (for 3 and 5 volt emulation) are included.

Powerful Development Features

PromICE/Serial provides unique features for developing optimal FPGA configurations.

Cascading Support: For large FPGAs, multiple ROMs are used to store a configuration. A single PromICE/Serial can emulate the memory of all the cascaded ROMs. It will correctly load all configuration files through the first ROM socket. This eliminates overflowing memory and the inconvenience of programming multiple ROMs during development

Banking: PromICE/Serial can loaded with alternative configuration files in up to 8 banks of emulation memory. Once these banks are loaded, they can be selected with a rotary switch on the unoROM. This allows quick and easy testing of alternate FPGA designs, measuring performance of individual features, and ready access to a "known good" or baseline design during testing.

 

      Serial ROMs Supported

Size in Bytes
Actual Bits
Manufacturer
ROM Part Number
8K
65,536
Xilinx
XC1765
16K
131,072
Xilinx
XC17128
32K
262,144
Xilinx
XC17256
64K
524,288
Xilinx
XC17512
128K
1,048,576
Xilinx
XC1701
256K
2,097,152
Altera
EPC2
32K
212,942
Altera
EPC1213
128K
1,046,496
Altera
EPC1
Maximum
MAX*8
Maximum to size of PromICE

 

PromICE/Serial Benefits

  • Eliminates time and cost of programming configuration ROMs for design iterations
  • Speeds up the design/test process.
  • Test FPGA configurations remotely from design software.
  • Makes it unnecessary to implement JTAG or microprocessor-based FPGA loading solutions used only during development.
  • Eliminate target hardware features needed only for design and test.
  • Quickly and easily test design alternatives.
  • Easily control design iteration changes.
  • Emulate new configuration EPROMs before silicon is available.

PromICE Reusability

Once FPGA configuration is complete, PromICE can be re-used to emulate standard memory for firmware development. PromICE is an invaluable tool for engineers "bringing up boards": testing hardware, modifying BIOSes and writing device drivers before the board is passed on to the software developers. Today, Hardware Engineers write more software than embedded software people did just a few years ago. PromICE is ideal for quickly testing initialization routines - our trace features can tell you exactly where things go wrong. Stop burning ROMs! After hardware development is complete, the PromICE can be used for embedded software development.

Conclusion

For over a decade, PromICE has emulated memory in hardware under development and provided quick downloading for testing firmware without programming ROM or flash. Now hardware designers can apply the same rapid debugging techniques to optimize FPGA configurations.

       
     
 
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