June 19, 2018
ARM spin locks
It is possible to implement multiprocessor spin locks on ARM systems using the strex/ldrex instructions.
It is claimed that the "S" bit in the MMU must be turned on for pages/sections where these instructions
will be used. Also, it would seem that some hardware support in the memory system is required for
all of this to work, and not all ARM based systems will support these instructions.
My experiences with the Allwinner H3 chip would indicate that these instructions do not work on
those systems, but I could be wrong. Setting the S bit yields Data Aborts when these instructions
are used, and without it being set, these instructions do not operated as expected.
Feedback? Questions?
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Tom's Computer Info / tom@mmto.org